Public Key Cryptographic Coprocessor

​​​​​The Public Key Cryptographic Coprocessor (PK2C) is a hardware accelerator intended to speed-up the core functions of public-key cryptography algorithms such as RSA, DSA, Diffie-Hellman, El-Gamal or Elliptic Curves (ECC).



Multiple algorithms
Configurable architecture
Low gate count
​​Direct Memory Access
Silicon proven


Direct Memory Access (DMA) and arbiter
Shared memory:

  • no extra silicon cost
  • inputs and results directly accessible by software

Multiple arithmetic operations:

  • integer multiply, multiply & accumulate, square, addition, subtraction
  • modular multiplication

All 32 bits multiple operations up to 8192 bits
Efficient software control through stackable operations:

  • the next operation can be anticipated to avoid software slowdown
  • the next operation is stacked then automatically executed once the PK2C is available

Configurable architecture:

  • small or fast RTL implementations available
  • gated clock insertion ready

Support CRT to speed-up RSA
Gate count smaller than 10 kgates
Straightforward integration through AMBA 3 AHB-Lite interface (customized on request)
PK2C-optimized software libraries available (RSA, DSA, DH, El-Gamal and ECC)
Typical consumption of contactless protocol smaller than 4 mA in a 130 nm implementation



VHDL source codes
VHDL test​ benches
Synopsys synthesis scripts
C integration tests
Design specification