Electromagnetic Pulse Detector
Specifications
Benefits
High sensitivity
Standard cell like
Ultra low power
Very compact
Easy integration
Features
Fully digital architecture packaged as a standard cell
Totally compliant with any standard cell design flow
Robust detection of EM and body biasing fault injections
Detection of both front-side and back-side EM injections
EM pulse susceptibility higher than that of standard designs
Detection of fault injection at both rising and falling edges
Permanent check of the internal output signals coherence
Detector size smaller than 75 equivalent NAND2 gates
Silicon proven on several families of advanced FPGA
Successfully evaluated by an independent laboratory
Deliverables
GDSII stream and layer map file
Library Exchange Format (LEF) file
Circuit Description Language (CDL) netlist
Liberty Timing File (.lib and .db)
VHDL behavioral model
Design specification