SWP Master Analog Front End

The Single Wire Protocol (SWP) Master Analog Front End (AFE) is a fully integrated interface intended to connect the NFC chip (SWP master) to the UICC (SWP slave) through a single wire.



ETSI TS 102 613 compliant
Low power architecture
Small silicon area
Straightforward integration
Silicon proven


Fully integrated SWP Master AFE​
fully compliant with the ETSI TS 102 613 standard
Operating junction temperature range: -40°C to +125°C
Silicon proven in a 130 nm and 55 nm CMOS processes
Characteristics of a 130 nm implementation:

  • typical operating current consumption smaller than 100 µA
  • typical standby current consumption smaller than 1 µA
  • silicon area (including a 80 µm x 80 µm pad) smaller than 0.03 mm²

Straightforward integration through a standard interface (customized on request)
Digital controller available separately


GDSII stream and layer map file
Library Exchange Format (LEF) file
Circuit Description Language (CDL) netlist
Liberty Timing File (.lib)
Design specification